Analog signal processing presents a number of advantages in a variety of implementations, including significant power efficiencies, computational efficiencies, and limited die area requirements. Unfortunately, analog design is often more costly than equivalent digital design due to an often time-consuming design and verification process. Many attempts have been made to apply rapid-prototyping techniques known from the digital domain to analog designs. Specifically, Field Programmable Analog Arrays (“FPAA”s) have been developed, which attempt to emulate the convenience and programmability of their digital counterparts, Field Programmable Gate Arrays (“FPGAs”). An FPAA is an integrated circuit, which can be configured to implement various analog functions using a set of Configurable Analog Blocks (“CAB”) and a programmable interconnection network. Each CAB can implement a number of analog signal processing functions such as amplification, integration, differentiation, addition, subtraction, multiplication, comparison, log, and exponential. Analog designers can use the FPAA for prototype and design verification or even for designs that are adaptable in the field to varying requirements or environmental conditions.
Therefore, it would be advantageous to provide an apparatus and method for efficiently and effectively programming arrays of floating-gate transistors.
Additionally, it would be advantageous to provide an apparatus and method to provide low power consumption device for rapidly programming arrays of floating-gate transistors.
Additionally, it would be advantageous to provide an improved system and method for providing a system for programming floating-gate transistors with a wide dynamic range.